automatic for Verilog : Automatic generator for Verilog HDL
| script karma |
Rating 134/67,
Downloaded by 5630 |
Comments, bugs, improvements
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Vim wiki
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| created by |
| gavin ge |
| |
| script type |
| ftplugin |
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| description |
Support Automatic functions like Emacs for Verilog HDL
Feature list:
1) Auto Argument (the same as Emacs)
2) Auto Instance (power than Emacs)
3) Auto Define Signals
4) Auto unit delay "<=" to "<= #`FFD"
5) Auto always block
6) Auto header
7) Auto comment
My blog: http://blog.sina.com.cn/arrowroothover
My E-mail: arrowroothover@hotmail.com |
| |
| install details |
put the automatic.vim in .vim/ftplugin/vlog/
befor.v: a Verilog example before run auto functions
after.v: a Verilog example after run auto functions |
| |
script versions (upload new version)
Click on the package to download.
| automatic.vim |
1.55 |
2008-10-01 |
7.0 |
gavin ge |
Fix bugs, compatiable with designware IP. |
| vim.rar |
1.50 |
2008-09-11 |
7.0 |
gavin ge |
Fix some bugs, support two styles of port declaration.
Add a new feature: automatic sensitive list, which is helpful for those do not support verilog 2001 yet.
Give examples for all automatice functions. |
| plugin.rar |
1.00 |
2008-09-08 |
7.0 |
gavin ge |
Initial upload |
ip used for rating: 216.73.216.155
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