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Birdie : A Vim plugin that facilitates Verilog netlist tracing.

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created by
TK Lam
 
script type
utility
 
description
Available commands

Commands should be invoked in the window showing the netlist.

Parse a Verilog netlist using the closed source parser:

:Parse
:ParseAll

The parser is a binary compatible with x86_64 Linux distros with kernel > = 2.6.32. :Parse just extracts the user-defined Verilog modules and instances; whereas :ParseAll extracts everything.

Show the information of the module under the cursor:

:Module

Go to the definition of the module whose name matches with the given regular expression:

:GoToModule <module name regex, e.g. free.*dom>

Go to the declaration of the instance whose instance path matches with the given regular expression:

:GoToInstance <instance path regex, e.g. /top_module_name/path/to/instanc.*>

Extract the definition of a module and put it on a separate buffer/window:

:OneModule <module name regex, e.g. free.*dom>

Show the hierarchy of the design:

:Hier

Source hosted at github: https://github.com/tklam/birdie
 
install details
Just :source the given vim_plugin/birdie.vim
This plugin works in x86_64 Linux only
 

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script versions (upload new version)

Click on the package to download.

package script version date Vim version user release notes
birdie.zip 1.2 2022-05-13 7.0 TK Lam - Support Python 3.10
- Print instance path before module name
birdie.zip 1.1 2022-04-23 7.0 TK Lam Increased the parser's stack size so that it can process large netlists.
birdie.zip 1.0 2022-04-10 7.0 TK Lam Initial upload
ip used for rating: 34.239.154.240

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