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verilog-support.vim : Verilog IDE -- Insert UVM & SystemVerilog code snippets, classes, comment, etc

 script karma  Rating 26/14, Downloaded by 2483  Comments, bugs, improvements  Vim wiki

created by
Jeff McNeal
 
script type
utility
 
description
IDE Heavily based on perl-support by Fritz and Wolfgang Mehner. I've followed their architecture to add similar support for UVM on SystemVerilog. Verilog-support.vim currently supports SystemVerilog and UVM on SV.

FEATURES
-------------------------------------------------------

The verilog-support.vim plugin adds a set of templates that can be used to insert blocks of code into SystemVerilog files.

- Comment templates: Insert comment headers for Tasks, Functions, Classes, Modules, etc. with menu or hot-key. Comments are suitable for NaturalDoc usage.
- UVM Class templates: Insert class boilerplate for a new UVM class with a menu or hot-key
- UVM Phase templates: Insert the various UVM phase tasks and functions with a menu or hot-key
- UVM idioms template: Insert various UVM code snippets (config_db, objections, etc.) using menu or hot-key.

Templates are user-configurable and extendable. If you have changes that you think others would find useful, please push them to me.

The help file online :  https://github.com/jmcneal/verilog-support/blob/master/doc/verilogsupport.txt


DOCUMENTATION
--------------------------------------------------------
This plug-in comes with a help file (verilogsupport.txt). Read it with

    :help verilogsupport

** PLEASE READ THE DOCUMENTATION **

Editing actions differ for different modes! There are a lot of features which
can be configured or customized to match your needs.


GitHub
--------------------------------------------------------
Verilog Support is on github:

https://github.com/jmcneal/verilog-support
 
install details
PATHOGEN
--------------------------------------------------------
I highly recommend using Tim Pope's pathogen.vim to manage vim plugins. Once you have installed that, copy and paste:

    cd ~/.vim/bundle
    git clone git://github.com/jmcneal/verilog-support.git

OR

MANUAL

Copy the zip archive verilog-support.zip to $HOME/.vim/ or $VIM/vimfiles
(on the Windows platforms) and run
    unzip verilog-support.zip
If you have already an older version of this plug-in and you have modified the
template files you may want to save your templates first or copy the files from
the archive by hand.
 

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script versions (upload new version)

Click on the package to download.

package script version date Vim version user release notes
verilog-support.zip 1.0 2017-02-21 7.0 Jeff McNeal Initial upload
ip used for rating: 18.220.137.164

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